Senior Post-Silicon Validation Engineer · Bangalore, India

Hi, I'm Hari.

Senior Post-Silicon Validation Engineer. I've spent 5 years bringing up, validating, characterising, and debugging ASICs and SoCs. I've also completed my M.Tech in Microelectronics from BITS Pilani.

I've interviewed at Qualcomm, IBM, Arm and several other top semiconductor companies, and received multiple offers from leading semiconductor companies. In 1:1 sessions I share what I learned to help students and early-career engineers prepare for theirs.

Are you a student?Current B.E./B.Tech or M.E./M.Tech students get one free session.

Book a free session →
  • 30-minute Google Meet
  • ₹99 + ₹3 payment fee per session
  • Secure payments by Razorpay
Photo of Hari Hara Sudhan R
Hari Hara Sudhan RSenior Post-Silicon Validation Engineer

Technical skills

  • CPU & CPU Subsystems
  • Multi-Core Cache Coherence
  • Cache Memory
  • Power & Clock Management
  • Low-Power Modes
  • Interrupts & Exceptions
  • NVIC & MPU
  • Boot Flow / Boot Sequence
View all skills →
Weekend slots open

1:1 Sessions

Personal guidance, 30 minutes at a time

All session details →

How it works

Booked in under two minutes

  1. 01

    Choose a session

    Interview preparation, resume guidance, career planning, or doubts & Q&A.

  2. 02

    Pick a time & pay ₹99 + ₹3 fee

    Weekend slots in your time zone. Secure checkout with UPI, cards or net banking.

  3. 03

    Meet on Google Meet

    Your Meet link arrives by email right away. 30 focused minutes, one to one.

Mentor network

A growing mentor network

Browse prep guides →

I'm joined by friends working in IT, VLSI design, and emulation, who share what they've learned through Prep Guides.

Ready to prepare for your next interview?

Book a 30-minute 1:1 session, or follow me on LinkedIn for new articles and interview tips.